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[VHDL-FPGA-Verilog] fir

Description: 利用Verilog语言编写的FPGA作为数字fir滤波器的程序，在编译器中调试通过，可以作为模块调用。-the model of fir digital cr which is written of verilog language.
Platform: | Size: 1024 | Author: saul | Hits:

[VHDL-FPGA-Verilog] fir_liujiao

Description: 利用verilog语言设计实现8路FIR滤波-Using verilog Language Design and Implementation of 8-channel FIR filter
Platform: | Size: 96256 | Author: juan | Hits:

[DSP program] dspddc_R12p1

Description: 基于DSPbuilder搭建的DDC，里面包括CIC滤波器，FIR低通滤波器，HB半带滤波器，NCO等，实现了GC5016芯片的功能-DSPbuilder erected based on DDC, which include the CIC filter, FIR low-pass filter, HB half-band filter, NCO, etc. to achieve the function of the GC5016 chip
Platform: | Size: 17408 | Author: 郑程 | Hits:

[Windows Develop] fir

Description: fir 滤波器 Systems generator 实现并转化为verilog语言-fir Filter Systems generator to achieve and into verilog language
Platform: | Size: 2671616 | Author: lynn | Hits:

[VHDL-FPGA-Verilog] 11FIRfliter

Description: 11阶FIR滤波器和（7，4）编码器的Verilog语言，高手的作品，放心下-11-order FIR filter, and (7,4) encoder of the Verilog language, master' s works, rest assured that the next
Platform: | Size: 2048 | Author: 王刚 | Hits:

[Program doc] DSP--base--on-FPGA

Description: 这是一本国外的经典教材，讲述了现阶段所有数字信号处理的FPGA实现，从第二章讲述二进制的算法到现阶段数字信号处理的研究热点，基于FPGA实现！包括FIR，自适应滤波，纠错码，调制解调，加密，傅立叶变换等等。更难能可贵的是每个例子都有VHDL和Verilog代码-This is a classic foreign materials, described at this stage all the digital signal processing FPGA, from the second chapter about the binary digital signal processing algorithms to the current stage of research focus, based on FPGA implementation! Including FIR, adaptive filtering, error-correcting codes, modulation and demodulation, encryption, Fourier transform and so on. Even more valuable is that each case has a VHDL and Verilog code! !
Platform: | Size: 7067648 | Author: 刘伟 | Hits:

[VHDL-FPGA-Verilog] cic_intp_64_four

Description: 4阶CIC内插滤波器，内插系数64，Verilog版本，数字下变频-4-order interpolating CIC filter interpolation factor of 64, Verilog version of the digital down-conversion
Platform: | Size: 1024 | Author: 王刚 | Hits:

[VHDL-FPGA-Verilog] 11orderFIR

Description: 11阶FIR数字滤波器，Verilog版本，数字下变频，适合初学-11-order FIR digital filter, Verilog version of the digital down conversion, suitable for beginners
Platform: | Size: 1024 | Author: 王刚 | Hits:

[Program doc] 103244864FIR_filter_DA_machine

Description: 简易fir滤波器，采用分布式算法实现，verilog-Simple fir filter using distributed algorithm, verilog
Platform: | Size: 1024 | Author: wang | Hits:

[VHDL-FPGA-Verilog] fir

Description: 用verilog编写的fir滤波器程序,可实现fir的硬件综合-Fir filters using verilog written procedures
Platform: | Size: 1024 | Author: 彭军伟 | Hits:

[VHDL-FPGA-Verilog] fir_16

Description: 用Verilog写的fir滤波器，16阶8位位宽，看看吧-Written using Verilog fir filter, 16-order 8-bit wide, to see if it
Platform: | Size: 743424 | Author: 刘安 | Hits:

[VHDL-FPGA-Verilog] fir_PGA

Description: 一种基于verilog的fir滤波源码，并带matlab仿真源程序。-Based on the fir filter verilog source code and source code with matlab simulation.
Platform: | Size: 23552 | Author: 对称 | Hits:

[VHDL-FPGA-Verilog] FIR_matlab_verilog

Description: matlab 仿真低通滤波器，然后用verilog硬件实现-using matlab to simulate a fir lowpass, then using verilog to implement it.
Platform: | Size: 3072 | Author: Fengxiaodong | Hits:

[VHDL-FPGA-Verilog] dilbalu_fir7

Description: basic fir filtering in verilog fpga in vhdl
Platform: | Size: 142336 | Author: dileepkumar | Hits:

[VHDL-FPGA-Verilog] FIR_chanbing

Description: FIR滤波器的verilog HDL语言编写的，希望对大家有用-FIR filter verilog HDL languages, we hope to be useful
Platform: | Size: 13312 | Author: | Hits:

[VHDL-FPGA-Verilog] fir

Description: FIR滤波器，使用Verilog硬件描述语言进行编程-FIR filter, using the Verilog hardware description language programming
Platform: | Size: 1024 | Author: zhaoyf | Hits:

[VHDL-FPGA-Verilog] ourdev_573514

Description: 高通滤波器的verilog实现，对初学者设计FIR有好处，分布式算法-Verilog implementation of high-pass filter, FIR design is good for beginners, distributed algorithm
Platform: | Size: 306176 | Author: 吴锦干 | Hits:

[VHDL-FPGA-Verilog] Digital-Signal-Processing-with-FPGA

Description: FPGA结合DSP设计，如FIR、IIR滤波器，CORDIC算法,多重采样率信号处理，FFT,有对应的VHDL/Verilog 代码code-FPGA Combines with DSP, FIR 、IIR Digital Filters,CORDIC,FFT,Adaptive Filters，VHDL/Verilog code
Platform: | Size: 10501120 | Author: rickdecent | Hits:

[VHDL-FPGA-Verilog] fir-filter

Description: fft的vhdl实现源代码，具体的有心情有兴趣的可以自己下载下来看下，因为我也是在入门中不懂。-fft verilog HDL
Platform: | Size: 7241728 | Author: liu | Hits:

[VHDL-FPGA-Verilog] DA_FIR_VERILOG

Description: 基于DA算法的FIR滤波器的verilog实现-DA-based FIR filter algorithm to achieve the verilog
Platform: | Size: 1024 | Author: wangyu | Hits:
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